1 /** 2 Copyright: Copyright (c) 2014 Andrey Penechko. 3 License: a$(WEB boost.org/LICENSE_1_0.txt, Boost License 1.0). 4 Authors: Andrey Penechko. 5 */ 6 7 module emulator.dcpu.constants; 8 9 /// Table of literal values which may be stored in 'a' operand. 10 static ushort[32] literals = 11 [0xFFFF, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 12 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 13 0x0F, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 14 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E]; 15 16 /// Operands which will read nex word increasing pc register are '1', other are '0'. 17 static immutable ushort[64] nextWordOperands = 18 [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 19 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 1, 1, 20 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 21 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]; 22 23 /// Table of basic instructions cost. 24 static immutable ubyte[32] basicCycles = 25 [10, 1, 2, 2, 2, 2, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 26 2, 2, 2, 2, 2, 2, 2, 2, 10, 10, 3, 3, 10, 10, 2, 2]; 27 28 /// Table of special instructions cost. 29 static immutable ubyte[32] specialCycles = 30 [10, 3, 10, 10, 10, 10, 10, 10, 4, 1, 1, 3, 2, 10, 10, 10, 31 2, 4, 4, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10]; 32 33 // Enums for opcodes. Just a bit of self documented code. 34 enum {SET = 0x01, ADD, SUB, MUL, MLI, DIV, DVI, 35 MOD, MDI, AND, BOR, XOR, SHR, ASR, SHL, 36 IFB, IFC, IFE, IFN, IFG, IFA, IFL, IFU, 37 ADX = 0x1A, SBX, STI = 0x1E, STD} 38 39 enum {JSR = 0x01, INT = 0x08, IAG, IAS, RFI, IAQ, HWN = 0x10, HWQ, HWI} 40 41 static string[] registerNames = ["A", "B", "C", "X", "Y", "Z", "I", "J"]; 42 43 static string[] basicOpcodeNames = 44 ["0x00", "SET", "ADD", "SUB", "MUL", "MLI", "DIV", "DVI", 45 "MOD", "MDI", "AND", "BOR", "XOR", "SHR", "ASR", "SHL", 46 "IFB", "IFC", "IFE", "IFN", "IFG", "IFA", "IFL", "IFU", 47 "0x18", "0x19", "ADX", "SBX", "0x1c", "0x1d", "STI", "STD"]; 48 49 static string[] specialOpcodeNames = 50 ["0x00", "JSR", "0x02", "0x03", "0x04", "0x05", "0x06", "0x07", 51 "INT", "IAG", "IAS", "RFI", "IAQ", "0x0d", "0x0e", "0x0f", 52 "HWN", "HWQ", "HWI", "0x0d", "0x13", "0x14", "0x15", "0x16", 53 "0x17", "0x18", "0x19", "0x1a", "0x1b", "0x1c", "0x1d", "0x1e", "0x1f"]; 54 55 static bool[32] isValidBasicOpcode = 56 [0,1,1,1,1,1,1,1, 57 1,1,1,1,1,1,1,1, 58 1,1,1,1,1,1,1,1, 59 0,0,1,1,0,0,1,1]; 60 61 static bool[32] isValidSpecialOpcode = 62 [0,1,0,0,0,0,0,0, 63 1,1,1,1,1,0,0,0, 64 1,1,1,0,0,0,0,0, 65 0,0,0,0,0,0,0,0];